# SPDX-License-Identifier: MIT
# Copyright (C) 2018-present iced project and contributors

# ⚠️This file was generated by GENERATOR!🦹‍♂️

# pylint: disable=invalid-name
# pylint: disable=line-too-long
# pylint: disable=too-many-lines

"""
Operand kind
"""

NONE: int = 0
"""
No operand
"""
FARBR2_2: int = 1
"""
Far branch 16-bit offset, 16-bit segment/selector
"""
FARBR4_2: int = 2
"""
Far branch 32-bit offset, 16-bit segment/selector
"""
MEM_OFFS: int = 3
"""
Memory offset without a modrm byte (eg. ``MOV AL,[offset]``)
"""
MEM: int = 4
"""
Memory (modrm)
"""
MEM_MPX: int = 5
"""
: Memory (modrm), MPX:

16/32-bit mode: must be 32-bit addressing

64-bit mode: 64-bit addressing is forced and must not be RIP relative
"""
MEM_MIB: int = 6
"""
: Memory (modrm), MPX:

16/32-bit mode: must be 32-bit addressing

64-bit mode: 64-bit addressing is forced and must not be RIP relative
"""
MEM_VSIB32X: int = 7
"""
Memory (modrm), vsib32, ``XMM`` registers
"""
MEM_VSIB64X: int = 8
"""
Memory (modrm), vsib64, ``XMM`` registers
"""
MEM_VSIB32Y: int = 9
"""
Memory (modrm), vsib32, ``YMM`` registers
"""
MEM_VSIB64Y: int = 10
"""
Memory (modrm), vsib64, ``YMM`` registers
"""
MEM_VSIB32Z: int = 11
"""
Memory (modrm), vsib32, ``ZMM`` registers
"""
MEM_VSIB64Z: int = 12
"""
Memory (modrm), vsib64, ``ZMM`` registers
"""
R8_OR_MEM: int = 13
"""
8-bit GPR or memory
"""
R16_OR_MEM: int = 14
"""
16-bit GPR or memory
"""
R32_OR_MEM: int = 15
"""
32-bit GPR or memory
"""
R32_OR_MEM_MPX: int = 16
"""
: 32-bit GPR or memory, MPX: 16/32-bit mode: must be 32-bit addressing, 64-bit mode: 64-bit addressing is forced
"""
R64_OR_MEM: int = 17
"""
64-bit GPR or memory
"""
R64_OR_MEM_MPX: int = 18
"""
: 64-bit GPR or memory, MPX: 16/32-bit mode: must be 32-bit addressing, 64-bit mode: 64-bit addressing is forced
"""
MM_OR_MEM: int = 19
"""
``MM`` register or memory
"""
XMM_OR_MEM: int = 20
"""
``XMM`` register or memory
"""
YMM_OR_MEM: int = 21
"""
``YMM`` register or memory
"""
ZMM_OR_MEM: int = 22
"""
``ZMM`` register or memory
"""
BND_OR_MEM_MPX: int = 23
"""
: ``BND`` register or memory, MPX: 16/32-bit mode: must be 32-bit addressing, 64-bit mode: 64-bit addressing is forced
"""
K_OR_MEM: int = 24
"""
``K`` register or memory
"""
R8_REG: int = 25
"""
8-bit GPR encoded in the ``reg`` field of the modrm byte
"""
R8_OPCODE: int = 26
"""
8-bit GPR encoded in the low 3 bits of the opcode
"""
R16_REG: int = 27
"""
16-bit GPR encoded in the ``reg`` field of the modrm byte
"""
R16_REG_MEM: int = 28
"""
16-bit GPR encoded in the ``reg`` field of the modrm byte. This is a memory operand and it uses the address size prefix (``67h``) not the operand size prefix (``66h``).
"""
R16_RM: int = 29
"""
16-bit GPR encoded in the ``mod + r/m`` fields of the modrm byte
"""
R16_OPCODE: int = 30
"""
16-bit GPR encoded in the low 3 bits of the opcode
"""
R32_REG: int = 31
"""
32-bit GPR encoded in the ``reg`` field of the modrm byte
"""
R32_REG_MEM: int = 32
"""
32-bit GPR encoded in the ``reg`` field of the modrm byte. This is a memory operand and it uses the address size prefix (``67h``) not the operand size prefix (``66h``).
"""
R32_RM: int = 33
"""
32-bit GPR encoded in the ``mod + r/m`` fields of the modrm byte
"""
R32_OPCODE: int = 34
"""
32-bit GPR encoded in the low 3 bits of the opcode
"""
R32_VVVV: int = 35
"""
32-bit GPR encoded in the the ``V'vvvv`` field (VEX/EVEX/XOP)
"""
R64_REG: int = 36
"""
64-bit GPR encoded in the ``reg`` field of the modrm byte
"""
R64_REG_MEM: int = 37
"""
64-bit GPR encoded in the ``reg`` field of the modrm byte. This is a memory operand and it uses the address size prefix (``67h``) not the operand size prefix (``66h``).
"""
R64_RM: int = 38
"""
64-bit GPR encoded in the ``mod + r/m`` fields of the modrm byte
"""
R64_OPCODE: int = 39
"""
64-bit GPR encoded in the low 3 bits of the opcode
"""
R64_VVVV: int = 40
"""
64-bit GPR encoded in the the ``V'vvvv`` field (VEX/EVEX/XOP)
"""
SEG_REG: int = 41
"""
Segment register encoded in the ``reg`` field of the modrm byte
"""
K_REG: int = 42
"""
``K`` register encoded in the ``reg`` field of the modrm byte
"""
KP1_REG: int = 43
"""
``K`` register (+1) encoded in the ``reg`` field of the modrm byte
"""
K_RM: int = 44
"""
``K`` register encoded in the ``mod + r/m`` fields of the modrm byte
"""
K_VVVV: int = 45
"""
``K`` register encoded in the the ``V'vvvv`` field (VEX/EVEX/XOP)
"""
MM_REG: int = 46
"""
``MM`` register encoded in the ``reg`` field of the modrm byte
"""
MM_RM: int = 47
"""
``MM`` register encoded in the ``mod + r/m`` fields of the modrm byte
"""
XMM_REG: int = 48
"""
``XMM`` register encoded in the ``reg`` field of the modrm byte
"""
XMM_RM: int = 49
"""
``XMM`` register encoded in the ``mod + r/m`` fields of the modrm byte
"""
XMM_VVVV: int = 50
"""
``XMM`` register encoded in the the ``V'vvvv`` field (VEX/EVEX/XOP)
"""
XMMP3_VVVV: int = 51
"""
``XMM`` register (+3) encoded in the the ``V'vvvv`` field (VEX/EVEX/XOP)
"""
XMM_IS4: int = 52
"""
``XMM`` register encoded in the the high 4 bits of the last 8-bit immediate (VEX/XOP only so only ``XMM0``-``XMM15``)
"""
XMM_IS5: int = 53
"""
``XMM`` register encoded in the the high 4 bits of the last 8-bit immediate (VEX/XOP only so only ``XMM0``-``XMM15``)
"""
YMM_REG: int = 54
"""
``YMM`` register encoded in the ``reg`` field of the modrm byte
"""
YMM_RM: int = 55
"""
``YMM`` register encoded in the ``mod + r/m`` fields of the modrm byte
"""
YMM_VVVV: int = 56
"""
``YMM`` register encoded in the the ``V'vvvv`` field (VEX/EVEX/XOP)
"""
YMM_IS4: int = 57
"""
``YMM`` register encoded in the the high 4 bits of the last 8-bit immediate (VEX/XOP only so only ``YMM0``-``YMM15``)
"""
YMM_IS5: int = 58
"""
``YMM`` register encoded in the the high 4 bits of the last 8-bit immediate (VEX/XOP only so only ``YMM0``-``YMM15``)
"""
ZMM_REG: int = 59
"""
``ZMM`` register encoded in the ``reg`` field of the modrm byte
"""
ZMM_RM: int = 60
"""
``ZMM`` register encoded in the ``mod + r/m`` fields of the modrm byte
"""
ZMM_VVVV: int = 61
"""
``ZMM`` register encoded in the the ``V'vvvv`` field (VEX/EVEX/XOP)
"""
ZMMP3_VVVV: int = 62
"""
``ZMM`` register (+3) encoded in the the ``V'vvvv`` field (VEX/EVEX/XOP)
"""
CR_REG: int = 63
"""
``CR`` register encoded in the ``reg`` field of the modrm byte
"""
DR_REG: int = 64
"""
``DR`` register encoded in the ``reg`` field of the modrm byte
"""
TR_REG: int = 65
"""
``TR`` register encoded in the ``reg`` field of the modrm byte
"""
BND_REG: int = 66
"""
``BND`` register encoded in the ``reg`` field of the modrm byte
"""
ES: int = 67
"""
``ES`` register
"""
CS: int = 68
"""
``CS`` register
"""
SS: int = 69
"""
``SS`` register
"""
DS: int = 70
"""
``DS`` register
"""
FS: int = 71
"""
``FS`` register
"""
GS: int = 72
"""
``GS`` register
"""
AL: int = 73
"""
``AL`` register
"""
CL: int = 74
"""
``CL`` register
"""
AX: int = 75
"""
``AX`` register
"""
DX: int = 76
"""
``DX`` register
"""
EAX: int = 77
"""
``EAX`` register
"""
RAX: int = 78
"""
``RAX`` register
"""
ST0: int = 79
"""
``ST(0)`` register
"""
STI_OPCODE: int = 80
"""
``ST(i)`` register encoded in the low 3 bits of the opcode
"""
IMM4_M2Z: int = 81
"""
4-bit immediate (m2z field, low 4 bits of the /is5 immediate, eg. ``VPERMIL2PS``)
"""
IMM8: int = 82
"""
8-bit immediate
"""
IMM8_CONST_1: int = 83
"""
Constant 1 (8-bit immediate)
"""
IMM8SEX16: int = 84
"""
8-bit immediate sign extended to 16 bits
"""
IMM8SEX32: int = 85
"""
8-bit immediate sign extended to 32 bits
"""
IMM8SEX64: int = 86
"""
8-bit immediate sign extended to 64 bits
"""
IMM16: int = 87
"""
16-bit immediate
"""
IMM32: int = 88
"""
32-bit immediate
"""
IMM32SEX64: int = 89
"""
32-bit immediate sign extended to 64 bits
"""
IMM64: int = 90
"""
64-bit immediate
"""
SEG_RSI: int = 91
"""
``seg:[rSI]`` memory operand (string instructions)
"""
ES_RDI: int = 92
"""
``es:[rDI]`` memory operand (string instructions)
"""
SEG_RDI: int = 93
"""
``seg:[rDI]`` memory operand (``(V)MASKMOVQ`` instructions)
"""
SEG_RBX_AL: int = 94
"""
``seg:[rBX+al]`` memory operand (``XLATB`` instruction)
"""
BR16_1: int = 95
"""
16-bit branch, 1-byte signed relative offset
"""
BR32_1: int = 96
"""
32-bit branch, 1-byte signed relative offset
"""
BR64_1: int = 97
"""
64-bit branch, 1-byte signed relative offset
"""
BR16_2: int = 98
"""
16-bit branch, 2-byte signed relative offset
"""
BR32_4: int = 99
"""
32-bit branch, 4-byte signed relative offset
"""
BR64_4: int = 100
"""
64-bit branch, 4-byte signed relative offset
"""
XBEGIN_2: int = 101
"""
``XBEGIN``, 2-byte signed relative offset
"""
XBEGIN_4: int = 102
"""
``XBEGIN``, 4-byte signed relative offset
"""
BRDISP_2: int = 103
"""
2-byte branch offset (``JMPE`` instruction)
"""
BRDISP_4: int = 104
"""
4-byte branch offset (``JMPE`` instruction)
"""
SIBMEM: int = 105
"""
Memory (modrm) and the sib byte must be present
"""
TMM_REG: int = 106
"""
``TMM`` register encoded in the ``reg`` field of the modrm byte
"""
TMM_RM: int = 107
"""
``TMM`` register encoded in the ``mod + r/m`` fields of the modrm byte
"""
TMM_VVVV: int = 108
"""
``TMM`` register encoded in the the ``V'vvvv`` field (VEX/EVEX/XOP)
"""
