A0,A1,A2,A3,A4,A5,A6,A7,A8,E0,E1,E2,E3,E4,E5,E6,E7,E8
X10,X11,X12,X13,X14,X15,X16,X17,X18,PA

# ---- START PROCESSING M1 ---- #


# (I0 = NAND2 A0' E0)
Th22 I0_0 A0_0 E0_1
Thand0 I0_1 A0_1 E0_0 A0_0 E0_1

# (I1 = NAND2 A1' E1)
Th22 I1_0 A1_0 E1_1
Thand0 I1_1 A1_1 E1_0 A1_0 E1_1

# (I2 = NAND2 A2' E2)
Th22 I2_0 A2_0 E2_1
Thand0 I2_1 A2_1 E2_0 A2_0 E2_1

# (I3 = NAND2 A3' E3)
Th22 I3_0 A3_0 E3_1
Thand0 I3_1 A3_1 E3_0 A3_0 E3_1

# (I4 = NAND2 A4' E4)
Th22 I4_0 A4_0 E4_1
Thand0 I4_1 A4_1 E4_0 A4_0 E4_1

# (I5 = NAND2 A5' E5)
Th22 I5_0 A5_0 E5_1
Thand0 I5_1 A5_1 E5_0 A5_0 E5_1

# (I6 = NAND2 A6' E6)
Th22 I6_0 A6_0 E6_1
Thand0 I6_1 A6_1 E6_0 A6_0 E6_1

# (I7 = NAND2 A7' E7)
Th22 I7_0 A7_0 E7_1
Thand0 I7_1 A7_1 E7_0 A7_0 E7_1

# (I8 = NAND2 A8' E8)
Th22 I8_0 A8_0 E8_1
Thand0 I8_1 A8_1 E8_0 A8_0 E8_1

# (I9 = AND4 I0 I1 I2 I3)
Th14 I9_0 I0_0 I1_0 I2_0 I3_0
Th44 I9_1 I0_1 I1_1 I2_1 I3_1

# (I10 = AND4 I4 I5 I6 I7)
Th14 I10_0 I4_0 I5_0 I6_0 I7_0
Th44 I10_1 I4_1 I5_1 I6_1 I7_1

# (I11 = AND2 I8 I9)
Thand0 I11_0 I8_0 I9_0 I8_1 I9_1
Th22 I11_1 I8_1 I9_1

# (PA = NAND2 I10 I11)
Th22 PA_0 I10_1 I11_1
Thand0 PA_1 I10_0 I11_0 I10_1 I11_1

# (X10 = XOR2 I0 PA)
Thxor0 X10_0 I0_0 PA_0 I0_1 PA_1
Thxor0 X10_1 I0_0 PA_1 I0_1 PA_0

# (X11 = XOR2 I1 PA)
Thxor0 X11_0 I1_0 PA_0 I1_1 PA_1
Thxor0 X11_1 I1_0 PA_1 I1_1 PA_0

# (X12 = XOR2 I2 PA)
Thxor0 X12_0 I2_0 PA_0 I2_1 PA_1
Thxor0 X12_1 I2_0 PA_1 I2_1 PA_0

# (X13 = XOR2 I3 PA)
Thxor0 X13_0 I3_0 PA_0 I3_1 PA_1
Thxor0 X13_1 I3_0 PA_1 I3_1 PA_0

# (X14 = XOR2 I4 PA)
Thxor0 X14_0 I4_0 PA_0 I4_1 PA_1
Thxor0 X14_1 I4_0 PA_1 I4_1 PA_0

# (X15 = XOR2 I5 PA)
Thxor0 X15_0 I5_0 PA_0 I5_1 PA_1
Thxor0 X15_1 I5_0 PA_1 I5_1 PA_0

# (X16 = XOR2 I6 PA)
Thxor0 X16_0 I6_0 PA_0 I6_1 PA_1
Thxor0 X16_1 I6_0 PA_1 I6_1 PA_0

# (X17 = XOR2 I7 PA)
Thxor0 X17_0 I7_0 PA_0 I7_1 PA_1
Thxor0 X17_1 I7_0 PA_1 I7_1 PA_0

# (X18 = XOR2 I8 PA)
Thxor0 X18_0 I8_0 PA_0 I8_1 PA_1
Thxor0 X18_1 I8_0 PA_1 I8_1 PA_0


# ---- DONE PROCESSING M1 ---- #