indat = """            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="M4" SLEW="FAST" name="ddr2_addr[0]" IN_TERM="" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="R2" SLEW="FAST" name="ddr2_addr[10]" IN_TERM="" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="K5" SLEW="FAST" name="ddr2_addr[11]" IN_TERM="" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="N6" SLEW="FAST" name="ddr2_addr[12]" IN_TERM="" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="P4" SLEW="FAST" name="ddr2_addr[1]" IN_TERM="" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="M6" SLEW="FAST" name="ddr2_addr[2]" IN_TERM="" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="T1" SLEW="FAST" name="ddr2_addr[3]" IN_TERM="" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="L3" SLEW="FAST" name="ddr2_addr[4]" IN_TERM="" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="P5" SLEW="FAST" name="ddr2_addr[5]" IN_TERM="" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="M2" SLEW="FAST" name="ddr2_addr[6]" IN_TERM="" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="N1" SLEW="FAST" name="ddr2_addr[7]" IN_TERM="" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="L4" SLEW="FAST" name="ddr2_addr[8]" IN_TERM="" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="N5" SLEW="FAST" name="ddr2_addr[9]" IN_TERM="" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="P2" SLEW="FAST" name="ddr2_ba[0]" IN_TERM="" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="P3" SLEW="FAST" name="ddr2_ba[1]" IN_TERM="" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="R1" SLEW="FAST" name="ddr2_ba[2]" IN_TERM="" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="L1" SLEW="FAST" name="ddr2_cas_n" IN_TERM="" />
            <Pin VCCAUX_IO="" IOSTANDARD="DIFF_SSTL18_II" PADName="L5" SLEW="FAST" name="ddr2_ck_n[0]" IN_TERM="" />
            <Pin VCCAUX_IO="" IOSTANDARD="DIFF_SSTL18_II" PADName="L6" SLEW="FAST" name="ddr2_ck_p[0]" IN_TERM="" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="M1" SLEW="FAST" name="ddr2_cke[0]" IN_TERM="" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="K6" SLEW="FAST" name="ddr2_cs_n[0]" IN_TERM="" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="T6" SLEW="FAST" name="ddr2_dm[0]" IN_TERM="" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="U1" SLEW="FAST" name="ddr2_dm[1]" IN_TERM="" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="R7" SLEW="FAST" name="ddr2_dq[0]" IN_TERM="UNTUNED_SPLIT_50" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="V5" SLEW="FAST" name="ddr2_dq[10]" IN_TERM="UNTUNED_SPLIT_50" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="U4" SLEW="FAST" name="ddr2_dq[11]" IN_TERM="UNTUNED_SPLIT_50" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="V4" SLEW="FAST" name="ddr2_dq[12]" IN_TERM="UNTUNED_SPLIT_50" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="T4" SLEW="FAST" name="ddr2_dq[13]" IN_TERM="UNTUNED_SPLIT_50" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="V1" SLEW="FAST" name="ddr2_dq[14]" IN_TERM="UNTUNED_SPLIT_50" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="T3" SLEW="FAST" name="ddr2_dq[15]" IN_TERM="UNTUNED_SPLIT_50" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="V6" SLEW="FAST" name="ddr2_dq[1]" IN_TERM="UNTUNED_SPLIT_50" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="R8" SLEW="FAST" name="ddr2_dq[2]" IN_TERM="UNTUNED_SPLIT_50" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="U7" SLEW="FAST" name="ddr2_dq[3]" IN_TERM="UNTUNED_SPLIT_50" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="V7" SLEW="FAST" name="ddr2_dq[4]" IN_TERM="UNTUNED_SPLIT_50" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="R6" SLEW="FAST" name="ddr2_dq[5]" IN_TERM="UNTUNED_SPLIT_50" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="U6" SLEW="FAST" name="ddr2_dq[6]" IN_TERM="UNTUNED_SPLIT_50" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="R5" SLEW="FAST" name="ddr2_dq[7]" IN_TERM="UNTUNED_SPLIT_50" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="T5" SLEW="FAST" name="ddr2_dq[8]" IN_TERM="UNTUNED_SPLIT_50" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="U3" SLEW="FAST" name="ddr2_dq[9]" IN_TERM="UNTUNED_SPLIT_50" />
            <Pin VCCAUX_IO="" IOSTANDARD="DIFF_SSTL18_II" PADName="V9" SLEW="FAST" name="ddr2_dqs_n[0]" IN_TERM="UNTUNED_SPLIT_50" />
            <Pin VCCAUX_IO="" IOSTANDARD="DIFF_SSTL18_II" PADName="V2" SLEW="FAST" name="ddr2_dqs_n[1]" IN_TERM="UNTUNED_SPLIT_50" />
            <Pin VCCAUX_IO="" IOSTANDARD="DIFF_SSTL18_II" PADName="U9" SLEW="FAST" name="ddr2_dqs_p[0]" IN_TERM="UNTUNED_SPLIT_50" />
            <Pin VCCAUX_IO="" IOSTANDARD="DIFF_SSTL18_II" PADName="U2" SLEW="FAST" name="ddr2_dqs_p[1]" IN_TERM="UNTUNED_SPLIT_50" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="M3" SLEW="FAST" name="ddr2_odt[0]" IN_TERM="" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="N4" SLEW="FAST" name="ddr2_ras_n" IN_TERM="" />
            <Pin VCCAUX_IO="" IOSTANDARD="SSTL18_II" PADName="N2" SLEW="FAST" name="ddr2_we_n" IN_TERM="" />"""
dat = indat.split("\n")
dat = [x.strip() for x in dat]

def extract(line):
    words = line.split(" ")
    padname = ""
    name = ""
    for word in words:
        if word[:8] == 'PADName=':
            padname = word[9:-1]
        if word[:5] == 'name=':
            name = word[6:-1]
    #print("set_property -dict { PACKAGE_PIN "+padname+" } [get_ports { "+name+" }];")
    print('NET   "'+name+'"                             LOC = "'+padname+'"   |    ;\n')
for line in dat:
    extract(line)
    
